JTAG Boundary Scan Architecture - A Hands-on Method To Test PCBs

Posted by davinmolli on April 8th, 2016

JTAG boundary-scan is a debugging method typically used to test modern Printed Circuit Boards (PCBs) after assembly. The test is also intended for measurement of voltage and analysis of sub-blocks inside the integrated circuits (ICs). Using the test logic built into many of today’s integrated circuits, boundary-scan can check if each components on the PCB are correctly inserted and soldered. Boundary-scan can be more accurately defined as a non-destructive method of PCB testing, system verification, prototyping and debugging. CPLDs, FPGAs, Microprocessors, DSPs, ASICs, Bus Logic, SERDES, Telecom Encoders, PHYs and Bridges (PCI/PCIe) are some of the devices that require JTAG boundary-scan test.

JTAG can test connections on PCBs that are implemented at the integrated circuit level. With traditional in-circuit testers, it becomes difficult to test complex circuits. The cost of board testing increases significantly due to physical space constraints and inability to access small components and tracks on the board. JTAG can be a cost-effective and feasible solution to test complex circuits.

JTAG boundary scan architecture provides a means to test clusters of logic, memories and other interconnects without using physical test probes. This basically includes adding at least one test cell connected to each pin of the device. The test cell can also selectively override the functionality of that pin. Each test cell can be programmed to drive a signal onto a pin. The cell at the destination of the board trace can then verify that the board trace properly connects the two pins. If the trace is open or is shorted, the correct signal value is not displayed at the destination pin. This indicates a fault.

Cells can be used to force data into the board, and to set up the test conditions. The relevant states can then feed back the test system by clocking the data word back. This technique allows a test system to gain test access to a board. Since PCBs are densely populated with components and tracks, test systems find it difficult to physically access the relevant area of the board for testing. Boundary-scan eases the testing process by giving the test system a physical access to the desired area on the board.

Today, a large number of device manufacturers are using JTAG boundary-scan technology to test and debug their products. Some of the leading manufacturers include Intel, ARM, Freescale, Analog Devices, NXP, PLX, ST, TI, Altera, Renesas, Xilinx, Lattice, Broadcom and Actel. If you are engaged in manufacturing PCBs, ICs or electronic devices, boundary-scan technology can help you produce quality products.

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